In summary, the Texas Instruments Concerto™ microcontroller is a dual core microcontroller based on a new system architecture for C2000, featuring an ARM Cortex™-M3 for host communication controls and a dedicated C2000 core and peripherals for the control type functions. The Cortex-M3 processor supports interrupts and system exceptions through the NVIC, which prioritizes and handles all the exceptions in this controller. To increase interrupt service, speed, and efficiency, a tail chaining model is used where the processor state is automatically stored to the stack on an exception and automatically restored from the stack at the end of the interrupt service routine. The memory protection unit improves system reliability by defining memory attributes such as no access, read/write, or read only for different memory regions. Concerto also features the external peripheral interface, EPI, which is a high speed parallel bus for external peripherals or memory. EPI is similar to a standard microprocessor address or data bus and has several modes of operation to interface to many types of external devices. The Concerto Ethernet controller has a fully integrated media access controller or MAC, but there is no network physical interface. Unlike the Ethernet portion, the USB does have the integrated physical layer, PHY, as well. The µDMA controller has a dedicated channel for each supported on-chip module and is used to perform transfers between memory and peripherals.